assembly - How to map own register operands in llvm-tablegen to instruction's opcode? -

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i'm trying implement "address register offset"-type operands. consist of base registers , offset registers: [k1 + k3]. in instruction's opcode need keep code register separately. found no way of 1) getting code of operand (is thing?) 2) mapping reg:$rm, reg:$rn of operand rm , rn fields of instruction directly. i'm getting rm placed in slot rn , rn merely ignored.

so how thing done?

when try add them via buildmi , print code seem written correctly, guess operands parsed properly.

operands description

def memrrasmoperand : asmoperandclass {   let name = "memrr";   let parsermethod = "parsememoperand"; }  class memrr<registeroperand reg> : operand<i32> {   let mioperandinfo = (ops reg:$rm, reg:$rn); <--- --- ---   let parsermatchclass = memrrasmoperand; }  let printmethod = "printmemoperand" in {   def memjj : memrr<registeroperand<jss>>;   def memkk : memrr<registeroperand<kss>>; }

instruction description

class ialuloadstoreinstbase<dag outs, dag ins, string mnemonic, string operands, list<dag> pattern> :   myinst<outs, ins, mnemonic, operands, pattern> {      ...    bits<5> ureg;    bits<5> rn;    bits<5> rm;       ... //itype opcode   let itype{25-21} = group;     let itype{20-16} = ureg;    let itype{15} = mod;   let itype{14} = lq;   let itype{13} = immflag;    let itype{12-8} = rm; <--- --- ---   let itype{7-6} = 0b00;   let itype{5-1} = rn; <--- --- ---   let itype{0} = q;    ...  }

multiclass fill flags , pass out's , ins'es

multiclass ialuloadinstdst<registeroperand dst, string mnemonic, string prefix, valuetype type> {   let wr = 0 in   {     let jk = 0 in     {       let mod = 0 in       {         defm fromjrr : ialuloadstorerrinstex<(outs dst:$ureg), (ins memjj:$src), <--- --- ---                                              !strconcat(mnemonic, "fromjrr"), !strconcat("$ureg, ", prefix, "[$src]"), <--- --- ---                                              [(set type:$ureg, (load addr:$src))]>; <--- --- ---       }     }     let jk = 1 in     {       let mod = 0 in       {         defm fromkrr : ialuloadstorerrinstex<(outs dst:$ureg), (ins memkk:$src), <--- --- ---                                              !strconcat(mnemonic, "fromkrr"), !strconcat("$ureg, ", prefix, "[$src]"), <--- --- ---                                              [(set type:$ureg, (load addr:$src))]>; <--- --- ---       }     }   } }

you need write own selection code such operands. such patterns called "complex" , need write custom instruction selection code them. see e.g. x86dagtodagisel::selectaddr() or systemzdagtodgaisel::selectbdaddr() , around.


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